Jasper Microcode
Microcode is used to patch the default programming of the EM8511 after a hardware reset.
Current Microcode
Below is a map of the current microcode for the EM8511 on Jasper, with 8MB of DRAM. (Firmware v1.5.1 - Microcode v0166.0001).
Program
Microcode programs consist of 16-bit words executed on the graphics RISC core of the chip.
Offset | Length | Contents | Default Value |
00000 | 0004 | Program Block | Binary Data |
00004 | 0004 | Program Block | Binary Data |
0000c | 0004 | Program Block | Binary Data |
00010 | 0004 | Program Block | Binary Data |
00014 | 0004 | Program Block | Binary Data |
00020 | 0004 | Program Block | Binary Data |
00024 | 0004 | Program Block | Binary Data |
00028 | 08fc | Program Block | Binary Data |
00924 | 079c | Program Block | Binary Data |
010c0 | 02dc | Program Block | Binary Data |
0139c | 011c | Program Block | Binary Data |
014b8 | 00a0 | Program Block | Binary Data |
01558 | 0058 | Program Block | Binary Data |
01ae0 | 0228 | Program Block | Binary Data |
Data
Offset | Length | Contents | Default Value |
00000 | 03d0 | Data Block | Binary Data |
00000 | 0002 | MV_Command | ffff |
00002 | 0002 | MV_Status | 0000 |
00004 | 0002 | MV_BuffStart_Lo | 4c00 |
00006 | 0002 | MV_BuffStart_Hi | 0024 |
00008 | 0002 | MV_BuffSize_Lo | 5000 |
0000a | 0002 | MV_BuffSize_Hi | 0005 |
0000c | 0002 | MV_RdPtr_Lo | 0000 |
0000e | 0002 | MV_RdPtr_Hi | 0000 |
00010 | 0002 | MV_Threshold | 0000 |
00012 | 0002 | MV_Wrptr_Lo | 0000 |
00014 | 0002 | MV_Wrptr_Hi | 0000 |
00024 | 0002 | MV_PCIRdPtr | 0015 |
00026 | 0002 | MV_PCIWrPtr | 0015 |
00028 | 0002 | MV_PCISize | 0090 |
0002a | 0002 | MV_PCIStart | 0000 |
0014a | 0002 | MV_PTSRdPtr | 00a8 |
0014c | 0002 | MV_PTSWrPtr | 00a8 |
0014e | 0002 | MV_PTSSize | 0098 |
00150 | 0002 | MV_PTSFifo | 0000 |
00290 | 0002 | MV_SCRSpeed_Frac | 0000 |
00292 | 0002 | MV_SCRSpeed | 0000 |
0029c | 0002 | MV_SCRlo | 0000 |
0029e | 0002 | MV_SCRhi | 0000 |
002a6 | 0002 | MV_FrameCntLo | 0000 |
002a8 | 0002 | MV_FrameCntHi | 0000 |
002aa | 0002 | MV_FrameEventLo | 0000 |
002ac | 0002 | MV_FrameEventHi | 0000 |
002ca | 0002 | TimeIncrRes | afc8 |
002e8 | 0002 | NxtVOBU_StartPTSHi | 0000 |
002f8 | 0002 | NxtVOBU_StartPTSLo | 0000 |
00308 | 0002 | NxtVOBU_EndPTSHi | 0000 |
0030a | 0002 | Width_Buf3 | 02d0 |
00318 | 0002 | NxtVOBU_EndPTSLo | 0000 |
00324 | 0002 | NxtVOBU_DisplayPTSHi | 0000 |
00328 | 0002 | NxtVOBU_DisplayPTSLo | 0000 |
0039a | 0002 | Width4 | 02d0 |
0039c | 0002 | Height4 | 01e0 |
0039e | 0002 | Pitch4 | 02d0 |
003bc | 0002 | NxtVOBU_BSize | 0000 |
003c6 | 0002 | DisplayPTSHi | 0000 |
003c8 | 0002 | DisplayPTSLo | 0000 |
003d0 | 0128 | Data Block | Binary Data |
003d0 | 0002 | SP_Command | 0000 |
003d2 | 0002 | SP_Status | 0000 |
003d4 | 0002 | SP_BuffStart_Lo | 3900 |
003d6 | 0002 | SP_BuffStart_Hi | 0022 |
003d8 | 0002 | SP_BuffSize_Lo | a000 |
003da | 0002 | SP_BuffSize_Hi | 0001 |
003dc | 0002 | SP_RdPtr_Lo | 0000 |
003de | 0002 | SP_RdPtr_Hi | 0000 |
003e2 | 0002 | SP_Wrptr_Lo | 0000 |
003e4 | 0002 | SP_Wrptr_Hi | 0000 |
003f4 | 0002 | SP_PCIRdPtr | 01fd |
003f6 | 0002 | SP_PCIWrPtr | 01fd |
003f8 | 0002 | SP_PCISize | 0048 |
003fa | 0002 | SP_PCIStart | 0000 |
004aa | 0002 | SP_PTSRdPtr | 0257 |
004ac | 0002 | SP_PTSSize | 0010 |
004ae | 0002 | SP_PTSFifo | 0000 |
004f8 | 00f4 | Data Block | Binary Data |
0053c | 0002 | DICOM_DisplayBuffer | 016d |
00546 | 0002 | LCH_VertPhaseTop | 0000 |
00548 | 0002 | LCH_VertPhaseBot | 0000 |
0054a | 0002 | LCH_VertPhaseTopBot | 0000 |
0054c | 0002 | LCH_VertPhaseBotTop | 0000 |
00592 | 0002 | Vsync_DBuf | 0000 |
005a8 | 0002 | DICOM_TvOut | 0000 |
005b0 | 0002 | DICOM_UpdateFlag | 0001 |
005b2 | 0002 | DICOM_VSyncLo1 | 0001 |
005b4 | 0002 | DICOM_VSyncLo2 | 0001 |
005b6 | 0002 | DICOM_VSyncDelay1 | 01e0 |
005b8 | 0002 | DICOM_VSyncDelay2 | 001e |
005ba | 0002 | DICOM_Display_Data | 0000 |
005d0 | 0002 | DICOM_Multiplication | 0001 |
005da | 0002 | DICOM_DisplayFieldId | 0000 |
005dc | 0002 | DICOM_PackedPicBuf | 0001 |
005de | 0002 | DICOM_Kmin | 0430 |
005e0 | 0002 | MicroCodeVersion | 0166 |
005e2 | 0002 | RevId | 0001 |
005e4 | 0002 | TVEncReg_Access | 0003 |
005ec | 0010 | Data Block | Binary Data |
005ec | 0002 | uVc_config | 0000 |
005ee | 0002 | uVC_pic_width | 02d0 |
005f0 | 0002 | uVC_pic_height | 01e0 |
005f2 | 0002 | uVC_xoffset | 0000 |
005f4 | 0002 | uVC_yoffset | 0000 |
005f6 | 0002 | uVC_scaleFactor | 0200 |
005f8 | 0002 | uVC_lineLength | 02d0 |
00600 | 0050 | Data Block | Binary Data |
00646 | 0002 | VsyncIntCnt | 0000 |
00648 | 0002 | Ovl_Addr | ffff |
0064a | 0002 | PCRIntCnt | 0000 |
0064c | 0002 | TempProbe | 0000 |
0064e | 0002 | CCError | 0000 |
00650 | 0370 | Data Block | Binary Data |
00650 | 0002 | MA_Command | ffff |
00652 | 0002 | MA_Status | 0000 |
00654 | 0002 | MA_BuffStart_Lo | 5c00 |
00656 | 0002 | MA_BuffStart_Hi | 0002 |
00658 | 0002 | MA_BuffSize | 4c00 |
0065a | 0002 | MA_BuffSize_Hi | 0000 |
0065c | 0002 | MA_Rdptr | 0000 |
0065e | 0002 | MA_Rdptr_Hi | 0000 |
00660 | 0002 | MA_Threshold | 0000 |
00662 | 0002 | MA_Wrptr | 0000 |
00664 | 0002 | MA_Wrptr_Hi | 0000 |
00666 | 0002 | Q_IrqMask | 0000 |
00668 | 0002 | Q_IrqStatus | 8000 |
0066a | 0002 | Q_IntCnt | 000a |
00674 | 0002 | MA_PCIRdPtr | 033d |
00676 | 0002 | MA_PCIWrPtr | 033d |
00678 | 0002 | MA_PCISize | 0090 |
0067a | 0002 | MA_PCIStart | 0000 |
0079a | 0002 | Audio_PTSFifo | 0000 |
008e0 | 0002 | Audio_PTSHi | 0000 |
008e2 | 0002 | Audio_PTSLo | 0000 |
008e4 | 0002 | Audio_PTSFrac | 0000 |
008ee | 0002 | Audio_PTSRdPtr | 03cd |
008f0 | 0002 | Audio_PTSWrPtr | 03cd |
008f2 | 0002 | Audio_PTSSize | 00a0 |
008f4 | 0002 | Audio_Dec_Mode | 0001 |
008f6 | 0002 | Audio_CompDualOCfg_Mode | 0800 |
008f8 | 0002 | Audio_DynamicRange | ffff |
008fa | 0002 | Audio_PCM_Conf0 | 0000 |
008fc | 0002 | Audio_PCM_Conf1 | 0000 |
008fe | 0002 | Audio_Serial_Control0 | 3c7f |
00900 | 0002 | Audio_Serial_Control1 | 000e |
00904 | 0002 | AudioSyncStatus | 0000 |
00906 | 0002 | MA_OBuffStart_Lo | a800 |
00908 | 0002 | MA_OBuffStart_Hi | 0002 |
0090a | 0002 | MA_OBuffSize | 5800 |
0090c | 0002 | DTSDecodeStatus | 0001 |
0090e | 0002 | MA_ORdptr | 0000 |
00910 | 0002 | DTSSyncLock | 0000 |
00914 | 0002 | MA_OWrptr | 0000 |
00916 | 0002 | DTSErrorCode | 0000 |
00918 | 0002 | DTSoverSPDIF | 0000 |
00926 | 0002 | PCR_Hi | 0000 |
00928 | 0002 | PCR_Lo | 0000 |
0092a | 0002 | PCR_Frac | 0000 |
00934 | 0002 | DeltaSCR_APTS | 0000 |
00936 | 0002 | DeltaSCR_APTSFrac | 0000 |
00968 | 0002 | AVSynchroType | 0000 |
0096a | 0002 | DeltaPCR_SCR_Max | 2ee0 |
0096c | 0002 | DeltaPCR_SCR_MaxFrac | 0000 |
0096e | 0002 | DeltaSCR_APTS_Max | 005a |
00970 | 0002 | DeltaSCR_APTS_MaxFrac | 0000 |
00972 | 0002 | k_TR | 0010 |
00976 | 0002 | SynchroTimResetVal | 1388 |
0097a | 0002 | Audio_RepeatCounter | 0000 |
0097c | 0002 | PCMScaleFactor | ffff |
0097e | 0002 | ASpeed_Frac | 0000 |
00980 | 0002 | ASpeed | 0009 |
00982 | 0002 | RefSpeed_Frac | 0000 |
00984 | 0002 | RefSpeed | 0009 |
00990 | 0002 | Jda1_config | 00c0 |
00992 | 0002 | Jda1_setup_lo | 0001 |
00994 | 0002 | Jda1_setup_hi | 0120 |
009c0 | 0294 | Data Block | Binary Data |
009c6 | 0002 | PicPTSLo | 0000 |
009c8 | 0002 | PicPTSHi | 0000 |
009f2 | 0002 | Horizontal_Size | 0000 |
009f4 | 0002 | Vertical_Size | 0000 |
009fa | 0002 | Picture_Rate | 0000 |
00a4a | 0002 | Decoder_Config | 0000 |
00a4c | 0002 | Error_Code | 0000 |
00a52 | 0002 | DecodeBuffer | 0000 |
00a5e | 0002 | DisplayHorSize | 021c |
00a6e | 0002 | Line21Buf1_Cnt | 0000 |
00a70 | 0002 | Line21Buf2_Cnt | 0000 |
00a7c | 0002 | TimeCodeHi | 0000 |
00a7e | 0002 | TimeCodeLo | 0000 |
00a86 | 0002 | VPTSEventHi | 0000 |
00a88 | 0002 | VPTSEventLo | 0000 |
00a8a | 0002 | EventType | 0000 |
00a90 | 0002 | FrCntGOP | 0000 |
00a90 | 0002 | FrNumInGOP | 0000 |
00a90 | 0002 | SentGOPs | 0000 |
00a90 | 0002 | DecToEventStatus | 0000 |
00a92 | 0002 | VideoStd | 0001 |
00b9c | 0002 | LBCinterrupt | 0000 |
00ba2 | 0002 | ForceFixedVOPRate | 0000 |
00bb2 | 0002 | FixedVopTimeIncrVal | 03e8 |
00bb4 | 0002 | FixedTimeIncrResVal | 5dc0 |
00bd6 | 0002 | CCBufferRdPtr | 05ee |
00bd8 | 0002 | CCBufferWrPtr | 05ee |
00bda | 0002 | CCBufferSize | 0010 |
00bdc | 0002 | CCBufferStart | 0000 |
00bfe | 0002 | DisplayInfo | 0000 |
00c16 | 0002 | VIP20Input | 0001 |
00c1a | 0002 | REV_SCRSpeed | 0009 |
00c1c | 0002 | REV_SCRSpeed_Frac | 0000 |
00c1e | 0002 | MasterChBaseAddr | 0c40 |
00c54 | 0080 | Data Block | Binary Data |
00c72 | 0002 | SPControlInfo | 003c |
00c74 | 0002 | Button_Color | 0000 |
00c76 | 0002 | Button_Contrast | 0000 |
00c8c | 0002 | Button_Top | 0000 |
00c8e | 0002 | Button_Bottom | 0000 |
00c90 | 0002 | Button_Left | 0000 |
00c92 | 0002 | Button_Right | 0000 |
00c94 | 0002 | SP_Palette | 00da |
00cd4 | 0070 | Data Block | Binary Data |
00d44 | 0060 | Data Block | Binary Data |
00d44 | 0002 | OSD_Command | ffff |
00d46 | 0002 | OSD_Status | 8000 |
00d48 | 0002 | OSD_BuffStart_Lo | a400 |
00d4a | 0002 | OSD_BuffStart_Hi | 0054 |
00d4c | 0002 | OSD_BuffSize_Lo | 5c00 |
00d4e | 0002 | OSD_BuffSize_Hi | 002b |
00d50 | 0002 | OSD_RdPtr_Lo | 0000 |
00d52 | 0002 | OSD_RdPtr_Hi | 0000 |
00d56 | 0002 | OSD_Wrptr_Lo | 0000 |
00d58 | 0002 | OSD_Wrptr_Hi | 0000 |
00d68 | 0002 | OSD_PCIRdPtr | 06b7 |
00d6a | 0002 | OSD_PCIWrPtr | 06b7 |
00d6c | 0002 | OSD_PCISize | 0018 |
00d6e | 0002 | OSD_PCIStart | 0000 |
00d9e | 0002 | OSDControlInfo | 0100 |
00da4 | 0044 | Data Block | Binary Data |
00de8 | 003c | Data Block | Binary Data |
00dea | 0002 | OSD_WinUpdateFlag | 0000 |
00df0 | 0002 | OSD_Top | 003c |
00df2 | 0002 | OSD_Bottom | 021b |
00df4 | 0002 | OSD_Left | 007e |
00df6 | 0002 | OSD_Right | 0343 |
00df8 | 0002 | OSD_HiLiTop | 003c |
00dfa | 0002 | OSD_HiLiBottom | 003c |
00dfc | 0002 | OSD_HiLiLeft | 007e |
00dfe | 0002 | OSD_HiLiRight | 007e |
00e04 | 0002 | OSD_Phase | 0000 |
00e24 | 002c | Data Block | Binary Data |
00e46 | 0002 | Force_PanScanDefHorSize | 0000 |
00e46 | 0002 | ForcedLeftParity | 0000 |
00e50 | 0028 | Data Block | Binary Data |
00e78 | 0024 | Data Block | Binary Data |
00e78 | 0002 | DICOM_FrameTop | 0014 |
00e7a | 0002 | DICOM_FrameBottom | 0103 |
00e7c | 0002 | DICOM_FrameLeft | 0084 |
00e7e | 0002 | DICOM_FrameRight | 0353 |
00e80 | 0002 | DICOM_VisibleTop | 0014 |
00e82 | 0002 | DICOM_VisibleBottom | 0103 |
00e84 | 0002 | DICOM_VisibleLeft | 0084 |
00e86 | 0002 | DICOM_VisibleRight | 0353 |
00e88 | 0002 | DICOM_BCSLuma | 4000 |
00e8a | 0002 | DICOM_BCSChroma | 4040 |
00e8c | 0002 | DICOM_Control | 1efe |
00e8e | 0002 | DICOM_Control2 | 0000 |
00e90 | 0002 | DICOM_Control3 | 0000 |
00e92 | 0002 | DICOM_ValidVisibleTop | 0014 |
00e94 | 0002 | DICOM_ValidVisibleBottom | 0103 |
00e96 | 0002 | DICOM_ValidVisibleLeft | 0084 |
00e98 | 0002 | DICOM_ValidVisibleRight | 0353 |
00e9c | 0020 | Data Block | Binary Data |
00e9c | 0002 | VOBU_LastPack | 0000 |
00eb6 | 0002 | RISCDSPContPtr | 0000 |
00eb8 | 0002 | RISCDSPSTCPtr | 0000 |
00ebc | 0020 | Data Block | Binary Data |
00ebc | 0002 | AUTH_Challenge | 001d |
00ed0 | 0002 | AUTH_Response | 0000 |
00eda | 0002 | AUTH_Command | 0000 |
00edc | 0018 | Data Block | Binary Data |
00ee6 | 0002 | AUTH_Acc | 00cc |
00ef4 | 0010 | Data Block | Binary Data |
00f3c | 00c0 | Data Block | Binary Data |
DRAM
Offset | Length | Contents | Default Value |
00000 | 0038 | DRAM Block | Binary Data |
00038 | 0004 | DRAM Block | Binary Data |
00040 | 0100 | DRAM Block | Binary Data |
00040 | 0002 | L21_Buf1 | 0000 |
000c0 | 0002 | L21_Buf2 | 0000 |
00140 | 0040 | DRAM Block | Binary Data |
00180 | 0040 | DRAM Block | Binary Data |
001c0 | 0040 | DRAM Block | Binary Data |
00200 | 0040 | DRAM Block | Binary Data |
00240 | 1200 | DRAM Block | Binary Data |
01440 | 0da8 | DRAM Block | Binary Data |
021e8 | 0c6c | DRAM Block | Binary Data |
02e54 | 0b08 | DRAM Block | Binary Data |
0395c | 0a94 | DRAM Block | Binary Data |
043f0 | 0a4c | DRAM Block | Binary Data |
04e3c | 0990 | DRAM Block | Binary Data |
057cc | 0980 | DRAM Block | Binary Data |
0614c | 0948 | DRAM Block | Binary Data |
06a94 | 07c4 | DRAM Block | Binary Data |
07258 | 0698 | DRAM Block | Binary Data |
078f0 | 0698 | DRAM Block | Binary Data |
07f88 | 0688 | DRAM Block | Binary Data |
08610 | 0640 | DRAM Block | Binary Data |
08c50 | 0640 | DRAM Block | Binary Data |
09290 | 05c0 | DRAM Block | Binary Data |
09850 | 05bc | DRAM Block | Binary Data |
09e0c | 05a0 | DRAM Block | Binary Data |
0a3ac | 0590 | DRAM Block | Binary Data |
0a93c | 0540 | DRAM Block | Binary Data |
0ae7c | 049c | DRAM Block | Binary Data |
0b318 | 0484 | DRAM Block | Binary Data |
0b79c | 047c | DRAM Block | Binary Data |
0bc18 | 0468 | DRAM Block | Binary Data |
0c080 | 0458 | DRAM Block | Binary Data |
0c4d8 | 03ec | DRAM Block | Binary Data |
0c8c4 | 03dc | DRAM Block | Binary Data |
0cca0 | 03c0 | DRAM Block | Binary Data |
0d060 | 03bc | DRAM Block | Binary Data |
0d41c | 0384 | DRAM Block | Binary Data |
0d7a0 | 0378 | DRAM Block | Binary Data |
0db18 | 0370 | DRAM Block | Binary Data |
0de88 | 036c | DRAM Block | Binary Data |
0e1f4 | 0304 | DRAM Block | Binary Data |
0e4f8 | 0304 | DRAM Block | Binary Data |
0e7fc | 0300 | DRAM Block | Binary Data |
0eafc | 028c | DRAM Block | Binary Data |
0ed88 | 0284 | DRAM Block | Binary Data |
0f00c | 0284 | DRAM Block | Binary Data |
0f290 | 0264 | DRAM Block | Binary Data |
0f4f4 | 0254 | DRAM Block | Binary Data |
0f748 | 0250 | DRAM Block | Binary Data |
0f998 | 0208 | DRAM Block | Binary Data |
0fba0 | 0200 | DRAM Block | Binary Data |
0fda0 | 01a0 | DRAM Block | Binary Data |
0ff40 | 0170 | DRAM Block | Binary Data |
100b0 | 0154 | DRAM Block | Binary Data |
10204 | 0120 | DRAM Block | Binary Data |
10324 | 0110 | DRAM Block | Binary Data |
10434 | 0110 | DRAM Block | Binary Data |
10544 | 010c | DRAM Block | Binary Data |
10650 | 00e0 | DRAM Block | Binary Data |
10730 | 00dc | DRAM Block | Binary Data |
1080c | 00d8 | DRAM Block | Binary Data |
108e4 | 00a0 | DRAM Block | Binary Data |
10984 | 0094 | DRAM Block | Binary Data |
10a18 | 0090 | DRAM Block | Binary Data |
10aa8 | 0088 | DRAM Block | Binary Data |
10b30 | 0074 | DRAM Block | Binary Data |
10ba4 | 0040 | DRAM Block | Binary Data |
Old Microcode Format
The stock KHWL driver uses a simple file format for microcode representation. It consists of a series of blocks, of various types. Each block is formatted as follows:
Offset | Length | Type | Description |
0x0000 | 0x01 | BYTE | Segment (01=Program, 02=Data, 04=DRAM) |
0x0001 | 0x01 | BYTE | Type (01=Unknown, 02=Symbol, 04=Constant) |
0x0002 | 0x04 | DWORD | Program offset, Data offset, Symbol offset (in WORDs), Constant value |
0x0006 | 0x04 | DWORD | Data/name length (in words) |
0x000A | {blen} | WORD[] | Block data or symbol/constant name |
Each byte of the symbol name is negated (XOR'ed with 0xFF). The name may or not be NUL-terminated, depending on alignment. The next data block starts at 0x0A + ({blen} * 2) bytes after the start of the current one.
NOTE: The DRAM segment blocks need every word of the block data to be byte-swapped before writing it to the DRAM memory.
New Microcode Format
For the new KHWL driver, there is a new microcode file format. The new microcode files consist of a backwards-compatible magic block header, followed by a list of 6 chunk lengths. If a chunk is not included (for being empty), its length is 0, and is completely excluded from the file. All values are stored little-endian.
Offset | Length | Type | Description |
0x0000 | 0x02 | WORD | Magic header type #0xFFFF |
0x0002 | 0x04 | DWORD | Magic header length #0x01000000 |
0x0006 | 0x04 | DWORD | Magic header value #0x01000000 |
0x000A | 0x04 | DWORD | Program Memory chunk length |
0x000E | 0x04 | DWORD | Data Memory chunk length |
0x0012 | 0x04 | DWORD | DRAM Memory chunk length |
0x0016 | 0x04 | DWORD | Reserved chunk length (always 0) |
0x0016 | 0x04 | DWORD | Symbols chunk length |
0x0016 | 0x04 | DWORD | Constants chunk length |
Memory Chunks
The Memory chunks (Program, Data, DRAM) consist of a series of data blocks, to be written to the graphics core as microcode. The data blocks are in a very simple format:
Offset | Length | Type | Description |
0x0000 | 0x04 | DWORD | Memory offset in hardware |
0x0004 | 0x02 | WORD | Block length in bytes |
0x0006 | {blen} | BYTE[] | Sereies of bytes to be written to Quasar |
The next data block starts at 0x06 + {blen} bytes after the start of the current one. For convenience, a DWORD of 0xFFFFFFFF (representing an invalid offset) trails all of the real data blocks in a given chunk to mark the end.
Symbols Chunk
The symbols chunk contains a list of symbols in the microcode available for external reference. Generally, these refer to registers in the Data Memory or buffers in the DRAM memory. Symbol items are stored in the chunk ordered by name length ({snlen}) and then by name. Symbols items are in the following format:
Offset | Length | Type | Description |
0x0000 | 0x03 | TBYTE | Memory offset in hardware |
0x0003 | 0x01 | BYTE | Symbol segment (01=Program, 02=Data, 04=DRAM) |
0x0004 | 0x01 | BYTE | Symbol name length (excluding NUL) |
0x0005 | {snlen} | BYTE[] | NUL-terminated symbol name |
The next string starts at 0x06 + {snlen} bytes after the start of the current one. While the NUL terminator may seem superfluous, it allows for string comparison without copying. The sort order allows (eg) skipping over names of the wrong length, and bailing out when a name comes after the one you're looking for. Potentially, a binary search could also be used.
Constants Chunk
The constants chunk contains a list of named constants. Currently, none exist. The format is as follows:
Offset | Length | Type | Description |
0x0000 | 0x04 | DWORD | Value of constant |
0x0004 | 0x01 | BYTE | Constant name length (excluding NUL) |
0x0005 | {cnlen} | BYTE[] | NUL-terminated symbol name |
The next constant starts at 0x06 + {cnlen} bytes after the current one.
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